The following is the summary of my work in the week of Aug 22 - Aug 28. 

	1. Finished the experiments of micro-architecture and floorplanning 
	   optimization under 5GHz 100nm technology and updated the paper 
	   with newly obtained data. 

	2. Port Fei's FPGA circuits into the DC/DC spice simulatins. Fei's   
	   FPGA circuits are treated as loading of the PWM/PFM circuit.  
	
	3. Finshed the outline of the DC/DC paper for FPGA2006. 
	
	4. Start to write the FPGA2006 paper. Finished to include reused 
	   Fei's part into the writting.