My work in the past week includes the following:

1. FPGA proposal
I finished the part for software compiled voltage domains on FPGAs. 
I elaborated the concepts such as Voltage Domain Cluster, Sibling Voltage domains, distributed voltage regulators.
I also wrote up the new CAD flow including clustering, Vdd assignments, Physical mapping

2. ISQED Slides
I have discussed with Hao about the ISQED presentations.
We have updated the slides and I have been preparing the talk.

3. Paper review for ISLPED
I have started review the papers for ISLPED. The first two papers I read is:
"A system-level approach for delay compensation of process variability impact on run-time configurable 
memory organizations."

"Improving Energy Efficiency by Making DRAM Less Randomly Accessed".