During this week, I'm working on the following aspects:

(1) The efficiency comparison of our approach compared to prima, sprim (iccad'04).
As the structured model reduction needs precomputed projection vector calculated from prima 
(like sprim in iccad'04),
there is no reduction time advantage for a similar ordered-reduction when comparing with prima.
However, because the structured model reduction can converge faster compared with prima 
at lower order reduction with the given error bound, I am working on the experiment to show this observation.
The preliminary result of small circuit (10K circuit element) 
the reduction time of our approach shows a little advantage (20.2s-prima-order-20  vs 18.3s-our-order-10) 
and I'm working on the larger circuit test to further verify it.
I think I can finish the experiment in this week. 

(2)Sparse matrix implementation 
I have implemented the sparse matrix not only during the partition, but also during the model reduction.
Right now, I'm debugging my implementation to verify the correctness. 
The code is verified for a 80K circuit example. The largest example it can run is 320K circuit with 260 ports. 
I'll rerun the previous experiment in in the sparse matrix venison. 

(3) Paper readings about model reduction concerning large number of ports.
I've read two papers of Friedman from IBM (DATE'04 and ICCAD'04). 
To handle the model with large number of ports like PG grid, he first uses a port vector partition 
and then times the partitioned port vectors with the state matrix to obtain the partitioned transfer functions. 
With partitioned the transfer functions, SVD (singular value decomposition) is then used 
during the model reduction to reduce the model size.
However, there are two problems of this approach all related to passivity:
(i) it is not clear if the SVD approximation can preserve the passivity;
(ii) the pre-partition with a consequent model-reduction of each partitioned transfer function 
may also lose the passivity.
I will try to find an example to show this observation in our paper. 
Note that in our approach, we implicitly use the structure of 
original model and apply the structure model reduction that keeps passivity. 
After reduction, we then explicitly partition the the resulting macro-model. 

(4) Others
I've written a preliminary proposal for ADI.
As for the interconnect-design project, 
the IBM design kit can be installed in linux but the comments from eehelp say
that the cadence and other software (synopsys and mentor) do not have a full version operated in linux.