The following is the summary of my work in the week of Jan 24 - Jan 30. 

	1. Analyze the power consumption of the PFM with on-chip  
	   inductance, and find out that total power efficiency
           is 60%, 20% power loss on the channel of the power transistors
           and around 15% power loss on the switching of the power 
           transistors. The inductance do consume certain power 
           but not as large as the switching of power transistors. 

	2. For off-chip inductance, with normal resistance of around 
           0.05 ohm, the power efficiency can still be over 85%. 

	3. Doing experiments on multi-phase PFM 

	4. Finished the changes for the uArchitecture general paper.