OPEN Processing Unit: a software/hardware tool-chain for the acceleration of general deep learning algorithms
Academic research of CPU has been facilitated greatly by open source toolchain and resources such as instruction set (ISA), compiler, and instruction/microarchitecture level simulation. Examples include SimpleScalar, GEM5, and more recently, RISC-V toolset. Yet, such open-source and complete eco-system does not exist for general machine learning algorithms. OpenOPU is meant to be an open-source and complete eco-system for machine learning hardware research, including: ISA with executable specifications, compiler with formal verification, instruction level (functional) and microarchitecture level (cycle-accurate) simulation, parametrized modules in RTL and Chisel, and FPGA emulation and development boards.
Our first release includes OPU (open processing unit for ML) for edge inference on FPGA. Future releases will extend to ISA and microarchitecture for both training and inference and for cloud AI computing as well as in-network AI computing, considering FPGA, SOC and 3D FPGA/SOC.
Currently, OPU is being used in a MURI Brain Computing Project
at UCLA, University of Michigan and Stanford University. (Last updated on Jul 14, 2020)