Projects

• New project to be ramped up: Multi-core architectures and applications
  • circuits and architectures for organic/CMOS hybrid 3D systems
  • task partitioning and scheduling of multimedia communication
  • FPGA implementation and emulation of multi-core systems
  
  
• Synthesis and Verification for Heterogeneous FPGA and Defect Tolerance
• FPGA Circuits, Architectures, and Physical Synthesis for Power Efficiency, Process Variation, and Reliability
• Leakage Power Modeling and Reduction Considering Temperature and Process Variations
• Layout and Power Estimation and Optimization at Microarchitecture and Register Transfer Levels
  • the 3rd most downloaded paper in 2006 among all papers ever published by IEEE Trans. on CAD [J20]
  • embedded tutorial, ISLPED, 2005, [T6]
  • invited paper, DAC, 2004, [C53]
  • half-day tutorial, ASPDAC, 2003, [T4]
  
  
• Variation Aware Modeling and Design
• Design and Design Methodology of Mixed-Signal Circuits
• System-in-Package and 3D integration
• RCLK Extraction, Sparsification and Model Order Reduction
• Interconnect-centric Physical Synthesis for Performance, Power and Variation Tolerance
  • Best paper nomination, ICCAD, 2007, [C108]
  • Best paper nomination, DAC, 2006, [C84]
  • Best paper Award, ISPD, 2006, [C81]
  • invited paper, Multi-level Interconnect Conference, 2004, [C55]
  • Best student paper award, ASICON, 2003, [C37]
  • Best paper nomination, CICC, 1999, [C11]
  • invited survey, Integration, the VLSI Journal, 1996, [J6]
  • full-day tutorial, DAC, 2006, [T9]
  • full-day tutorial, ASPDAC, 2006, [T8]
  • half-day tutorial, ICCAD, 2005, [T7]
  • half-day tutorial, ISQED, 2005, [T5]
  • half-day tutorial, ASPDAC, 2003, [T4]
  • half-day tutorial, ISCAS, 2002, [T3]
  • half-day tutorial, ASIC/SOC conference, 2000, [T2]
  • embedded tutorial, ICCAD 1997, [T1]