andOf(AiModRef x, AiModRef y) | oagFpga::AiModGraph | [static] |
chooseEquivalent(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
clearExternalReferences(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
clearKfeasibleCuts(oa::oaModule *module) | oagFpga::AiModGraph | [static] |
connectEquivalentNetsInGraph(oa::oaModule *module) | oagFpga::AiModGraph | [static] |
constantOne(oa::oaModule *module) | oagFpga::AiModGraph | [inline, static] |
constantZero(oa::oaModule *module) | oagFpga::AiModGraph | [inline, static] |
convertAiModRefListToRefList(const list< AiModRef > &source, list< oagAi::Ref > &result) | oagFpga::AiModGraph | [protected, static] |
convertRefListToAiModRefList(const list< oagAi::Ref > &source, oa::oaModule *module, list< AiModRef > &result) | oagFpga::AiModGraph | [protected, static] |
convertRefVectorToAiModRefVector(const vector< oagAi::Ref > &source, oa::oaModule *module, vector< AiModRef > &result) | oagFpga::AiModGraph | [protected, static] |
Cut typedef | oagFpga::AiModGraph | |
CutSet typedef | oagFpga::AiModGraph | |
decrementExternalReferences(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
detach(AiModRef x) | oagFpga::AiModGraph | [static] |
enumerateKfeasibleCuts(AiModRef x, unsigned int maxCutSize, int maxCutCout=-1, int maxCutDepth=-1, bool includeConstantNode=true) | oagFpga::AiModGraph | [static] |
failIfInDifferentModules(oa::oaModule *x, oa::oaModule *y) | oagFpga::AiModGraph | [inline, protected, static] |
failIfInDifferentModules(AiModRef x, AiModRef y) | oagFpga::AiModGraph | [inline, protected, static] |
findDriverOfEquivalentNets(oa::oaModBitNet *net) | oagFpga::AiModGraph | [static] |
getAllConnections(oa::oaModBitNet *net, set< oa::oaModBitNet * > &connectedNets, set< AiModRef > &connectedRefs, bool searchForwardThroughGraph=true, bool searchBackwardThroughGraph=true, bool searchThroughEquivNets=true, bool searchThroughEquivRefs=false, bool includeSelf=true) | oagFpga::AiModGraph | [static] |
getAllConnections(AiModRef x, set< oa::oaModBitNet * > &connectedNets, set< AiModRef > &connectedRefs, bool searchForwardThroughGraph=true, bool searchBackwardThroughGraph=true, bool searchThroughEquivNets=true, bool searchThroughEquivRefs=false, bool includeSelf=true) | oagFpga::AiModGraph | [static] |
getAllNodes(oa::oaModule *module, list< AiModRef > &result) | oagFpga::AiModGraph | [static] |
getAndLeft(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
getAndRight(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
getEquivalents(AiModRef x, list< AiModRef > &result) | oagFpga::AiModGraph | [static] |
getFaninCone(AiModRef x, const list< AiModRef > &coneRoots, list< AiModRef > &transitiveFanin, bool includeRoots=true) | oagFpga::AiModGraph | [static] |
getFaninRoots(AiModRef x, list< AiModRef > &faninRoots) | oagFpga::AiModGraph | [static] |
getFanout(AiModRef x) | oagFpga::AiModGraph | [static] |
getFanout(AiModRef x, list< AiModRef > &result) | oagFpga::AiModGraph | [static] |
getFanoutCone(AiModRef x, const list< AiModRef > &coneRoots, list< AiModRef > &transitiveFanout, bool includeRoots=true) | oagFpga::AiModGraph | [static] |
getFanoutOfEquivalentNodes(AiModRef x, list< AiModRef > &result) | oagFpga::AiModGraph | [static] |
getFanoutRoots(AiModRef x, list< AiModRef > &fanoutRoots) | oagFpga::AiModGraph | [static] |
getGraph(oa::oaDesign *design) | oagFpga::AiModGraph | [inline, protected, static] |
getGraph(oa::oaModule *module) | oagFpga::AiModGraph | [inline, protected, static] |
getGraph(const AiModRef &x) | oagFpga::AiModGraph | [inline, protected, static] |
getInputs(oa::oaModule *module, list< AiModRef > &result) | oagFpga::AiModGraph | [static] |
getLocalStates(oa::oaModule *module, list< AiModRef > &result) | oagFpga::AiModGraph | [static] |
getNetToAiConnection(AiModRef ref) | oagFpga::AiModGraph | [static] |
getNetToAiConnection(oa::oaModBitNet *net) | oagFpga::AiModGraph | [static] |
getNextState(AiModRef sequential) | oagFpga::AiModGraph | [inline, static] |
getNodeType(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
getNonInverted(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
getNull(oa::oaModule *module) | oagFpga::AiModGraph | [inline, static] |
getOutputs(oa::oaModule *module, list< AiModRef > &result) | oagFpga::AiModGraph | [static] |
getSequentialData(AiModRef sequential) | oagFpga::AiModGraph | [inline, static] |
getTerminalDriver(AiModRef terminal) | oagFpga::AiModGraph | [inline, static] |
getTransitiveFanin(AiModRef x, list< AiModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getTransitiveFanin(AiModRef x, vector< AiModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getTransitiveFanin(list< AiModRef > x, list< AiModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getTransitiveFanin(list< AiModRef > x, vector< AiModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getTransitiveFanout(AiModRef x, list< AiModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getTransitiveFanout(AiModRef x, vector< AiModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getTransitiveFanout(list< AiModRef > x, list< AiModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getTransitiveFanout(list< AiModRef > x, vector< AiModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::AiModGraph | [static] |
getUserData(AiModRef x, unsigned int index) | oagFpga::AiModGraph | [inline, static] |
hasCombinationalCycle(oa::oaModule *module) | oagFpga::AiModGraph | [static] |
hasFanout(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
incrementExternalReferences(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
isAnd(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
isInverted(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
isNull(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
isSequential(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
isTerminal(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
newAnd(AiModRef x, AiModRef y) | oagFpga::AiModGraph | [static] |
newSequential(AiModRef nextState) | oagFpga::AiModGraph | [inline, static] |
newTerminal(AiModRef terminal) | oagFpga::AiModGraph | [inline, static] |
notOf(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
prepareNetToAiConnection(oa::oaModBitNet *net) | oagFpga::AiModGraph | [static] |
print(oa::oaModule *module) | oagFpga::AiModGraph | [static] |
removeEquivalences(AiModRef x) | oagFpga::AiModGraph | [inline, static] |
removeNetToAiConnection(oa::oaModBitNet *net) | oagFpga::AiModGraph | [static] |
resubstitute(AiModRef original, AiModRef replacement) | oagFpga::AiModGraph | [static] |
resubstitute(AiModRef original, AiModRef replacement, AiModRef target) | oagFpga::AiModGraph | [static] |
setAndLeft(AiModRef x, AiModRef left) | oagFpga::AiModGraph | [static] |
setAndRight(AiModRef x, AiModRef left) | oagFpga::AiModGraph | [static] |
setEquivalent(AiModRef x, AiModRef y) | oagFpga::AiModGraph | [static] |
setNetToAiConnection(oa::oaModBitNet *net, AiModRef ref) | oagFpga::AiModGraph | [static] |
setNextState(AiModRef sequential, AiModRef nextState) | oagFpga::AiModGraph | [static] |
setTerminalDriver(AiModRef terminal, AiModRef driver) | oagFpga::AiModGraph | [static] |
setUserData(AiModRef x, unsigned int index, unsigned int data) | oagFpga::AiModGraph | [inline, static] |
SimMod class | oagFpga::AiModGraph | [friend] |
testEquivalence(AiModRef x, AiModRef y) | oagFpga::AiModGraph | [static] |