| connectEquivalentNetsInGraph(oa::oaModule *module) | oagFpga::ModGraph | [static] |
| constantOne(oa::oaModule *module) | oagFpga::ModGraph | [inline, static] |
| constantZero(oa::oaModule *module) | oagFpga::ModGraph | [inline, static] |
| convertModRefListToRefList(const list< ModRef > &source, list< BBRef > &result) | oagFpga::ModGraph | [static] |
| convertRefListToModRefList(const list< BBRef > &source, oa::oaModule *module, list< ModRef > &result) | oagFpga::ModGraph | [static] |
| convertRefVectorToModRefVector(const vector< BBRef > &source, oa::oaModule *module, vector< ModRef > &result) | oagFpga::ModGraph | [static] |
| failIfInDifferentModules(oa::oaModule *x, oa::oaModule *y) | oagFpga::ModGraph | [inline, static] |
| failIfInDifferentModules(ModRef x, ModRef y) | oagFpga::ModGraph | [inline, static] |
| findDriverOfEquivalentNets(oa::oaModBitNet *net) | oagFpga::ModGraph | [static] |
| getFanin(ModRef x) | oagFpga::ModGraph | [static] |
| getFanout(ModRef x) | oagFpga::ModGraph | [static] |
| getFanout(ModRef x, list< ModRef > &result) | oagFpga::ModGraph | [static] |
| getGraph(oa::oaDesign *design) | oagFpga::ModGraph | [inline, static] |
| getGraph(oa::oaModule *module) | oagFpga::ModGraph | [inline, static] |
| getGraph(const ModRef &x) | oagFpga::ModGraph | [inline, static] |
| getNetToBBConnection(ModRef ref) | oagFpga::ModGraph | [static] |
| getNetToBBConnection(oa::oaModBitNet *net) | oagFpga::ModGraph | [static] |
| getNextState(ModRef sequential) | oagFpga::ModGraph | [inline, static] |
| getNodeOptType(ModRef x) | oagFpga::ModGraph | [inline, static] |
| getNodeSeqType(ModRef x) | oagFpga::ModGraph | [inline, static] |
| getNodeType(ModRef x) | oagFpga::ModGraph | [inline, static] |
| getNull(oa::oaModule *module) | oagFpga::ModGraph | [inline, static] |
| getNumOutputBits(ModRef x) | oagFpga::ModGraph | [inline, static] |
| getOutputs(oa::oaModule *module, list< ModRef > &result) | oagFpga::ModGraph | [static] |
| getPrimaryBBID(ModRef x) | oagFpga::ModGraph | [inline, static] |
| getTerminalDriver(ModRef terminal) | oagFpga::ModGraph | [inline, static] |
| getTransitiveFanin(ModRef x, list< ModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| getTransitiveFanin(ModRef x, vector< ModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| getTransitiveFanin(list< ModRef > x, list< ModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| getTransitiveFanin(list< ModRef > x, vector< ModRef > &transitiveFanin, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| getTransitiveFanout(ModRef x, list< ModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| getTransitiveFanout(ModRef x, vector< ModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| getTransitiveFanout(list< ModRef > x, list< ModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| getTransitiveFanout(list< ModRef > x, vector< ModRef > &transitiveFanout, bool includeRoots=true, bool crossSequential=false) | oagFpga::ModGraph | [static] |
| hasCombinationalCycle(oa::oaModule *module) | oagFpga::ModGraph | [static] |
| hasFanout(ModRef x) | oagFpga::ModGraph | [inline, static] |
| isFunctional(ModRef x) | oagFpga::ModGraph | [inline, static] |
| isNull(ModRef x) | oagFpga::ModGraph | [inline, static] |
| isSequential(ModRef x) | oagFpga::ModGraph | [inline, static] |
| isTerminal(ModRef x) | oagFpga::ModGraph | [inline, static] |
| prepareNetToBBConnection(oa::oaModBitNet *net) | oagFpga::ModGraph | [static] |
| removeNetToBBConnection(oa::oaModBitNet *net) | oagFpga::ModGraph | [static] |
| setNetToBBConnection(oa::oaModBitNet *net, ModRef ref) | oagFpga::ModGraph | [static] |
| setTerminalDriver(ModRef terminal, ModRef driver) | oagFpga::ModGraph | [static] |
