| addLeafLibrary(oa::oaLib *library) | oagFpga::Synthesis | [inline, static] |
| addLeafView(const oa::oaScalarName &viewName) | oagFpga::Synthesis | [inline, static] |
| andOf(MultiRef e1, MultiRef e2) | oagFpga::Synthesis | [protected, static] |
| arithmeticAdd(MultiRefBus &result, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| arithmeticDivide(MultiRefBus &result, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| arithmeticModulo(MultiRefBus &result, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| arithmeticMultiply(MultiRefBus &result, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| arithmeticSubtract(MultiRefBus &result, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| arithmeticSubtract(MultiRefBus &result, MultiRef &negFlag, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| assignMultiRef(oa::oaModBitNet *net, const MultiRef e) | oagFpga::Synthesis | [protected, static] |
| binaryBusInputOutputOpt(RtlNode::OptType optType, int numOutBits, MultiRefBus &result, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| binaryBusOpt(RtlNode::OptType optType, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| binaryOpt(RtlNode::OptType optType, MultiRef e1, MultiRef e2) | oagFpga::Synthesis | [protected, static] |
| checkForExistenceOfDesign(oa::oaScalarName libName, oa::oaScalarName cellName, oa::oaScalarName viewName) | oagFpga::Synthesis | [protected, static] |
| connectPort(oa::oaModInst *inst, oa::oaModNet *net, unsigned int portPosition) | oagFpga::Synthesis | [protected, static] |
| connectPort(oa::oaModInst *inst, oa::oaModNet *net, const string port) | oagFpga::Synthesis | [protected, static] |
| constantOne() | oagFpga::Synthesis | [protected, static] |
| constantZero() | oagFpga::Synthesis | [protected, static] |
| createBusNet(const string identifier, int start, int stop) | oagFpga::Synthesis | [protected, static] |
| createModule(const string identifier) | oagFpga::Synthesis | [protected, static] |
| createScalarNet(const string identifier) | oagFpga::Synthesis | [protected, static] |
| createTerm(oa::oaModNet *net, const string identifier, oa::oaTermType direction, unsigned int portPosition=oacNullIndex) | oagFpga::Synthesis | [protected, static] |
| currentLibrary | oagFpga::Synthesis | [protected, static] |
| currentManager | oagFpga::Synthesis | [protected, static] |
| currentModule | oagFpga::Synthesis | [protected, static] |
| currentView | oagFpga::Synthesis | [protected, static] |
| equalTo(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| findBusNet(const string identifier) | oagFpga::Synthesis | [protected, static] |
| findBusNetBit(const string identifier, const int bit) | oagFpga::Synthesis | [protected, static] |
| findModule(const string identifier) | oagFpga::Synthesis | [protected, static] |
| findNet(const string identifier) | oagFpga::Synthesis | [protected, static] |
| findScalarNet(const string identifier) | oagFpga::Synthesis | [protected, static] |
| greaterThan(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| greaterThanEqual(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| instantiateModule(oa::oaDesign *master, const string name) | oagFpga::Synthesis | [protected, static] |
| latch(MultiRef enable, MultiRef in, const string name="") | oagFpga::Synthesis | [protected, static] |
| leafLibs | oagFpga::Synthesis | [protected, static] |
| leafViews | oagFpga::Synthesis | [protected, static] |
| leftShift(MultiRefBus &result, MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| lessThan(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| lessThanEqual(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| logicAnd(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| logicNot(MultiRefBus &l1) | oagFpga::Synthesis | [protected, static] |
| logicOr(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| MapperUtils class | oagFpga::Synthesis | [friend] |
| multiBitConstant(MultiRefBus &result, int value, int bits=0) | oagFpga::Synthesis | [protected, static] |
| mux(MultiRef select, MultiRef in0, MultiRef in1) | oagFpga::Synthesis | [protected, static] |
| mux(MultiRefBus &select, MultiRefBus &in0) | oagFpga::Synthesis | [protected, static] |
| mux(MultiRefBus &result, MultiRefBus &select, MultiRefBus &in0, MultiRefBus &in1) | oagFpga::Synthesis | [protected, static] |
| NAME_LENGTH_LIMIT | oagFpga::Synthesis | [protected, static] |
| nameSpace | oagFpga::Synthesis | [protected, static] |
| nandOf(MultiRef e1, MultiRef e2) | oagFpga::Synthesis | [protected, static] |
| norOf(MultiRef e1, MultiRef e2) | oagFpga::Synthesis | [protected, static] |
| notEqualTo(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
| notOf(MultiRef e) | oagFpga::Synthesis | [protected, static] |
| orOf(MultiRef e1, MultiRef e2) | oagFpga::Synthesis | [protected, static] |
| overwriteStructure | oagFpga::Synthesis | [protected, static] |
| reductionAnd(MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| reductionNand(MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| reductionNor(MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| reductionOr(MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| reductionXnor(MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| reductionXor(MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| seq(MultiRef in, MultiRef clock, const string name="") | oagFpga::Synthesis | [protected, static] |
| seq(MultiRef in, MultiRef clock, MultiRef aLoad, MultiRef aData, const string name="") | oagFpga::Synthesis | [protected, static] |
| setLibrary(oa::oaLib *library) | oagFpga::Synthesis | [inline, static] |
| setOverwriteStructure(bool overwrite) | oagFpga::Synthesis | [static] |
| setView(oa::oaView *view) | oagFpga::Synthesis | [inline, static] |
| unaryBusInputOutputOpt(RtlNode::OptType optType, int numOutBits, MultiRefBus &result, MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| unaryBusOpt(RtlNode::OptType optType, MultiRefBus &l) | oagFpga::Synthesis | [protected, static] |
| xnorOf(MultiRef e1, MultiRef e2) | oagFpga::Synthesis | [protected, static] |
| xorOf(MultiRef e1, MultiRef e2) | oagFpga::Synthesis | [protected, static] |
| zeroExpand(MultiRefBus &l1, MultiRefBus &l2) | oagFpga::Synthesis | [protected, static] |
