oagFpga::VerilogDesign::Port Class Reference

A port definition (from inside a portlist). More...

#include <oagFpgaVerilogDesign.h>

List of all members.

Public Member Functions
	~Port ()
Public Attributes
std::string	externalName
int	position
std::string	internalName

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Detailed Description

A port definition (from inside a portlist).

Definition at line 157 of file oagFpgaVerilogDesign.h.

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Constructor & Destructor Documentation

oagFpga::VerilogDesign::Port::~Port (   )  [inline]

Definition at line 165 of file oagFpgaVerilogDesign.h.

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Member Data Documentation

std::string oagFpga::VerilogDesign::Port::externalName

Definition at line 160 of file oagFpgaVerilogDesign.h. Referenced by oagFpga::VerilogSynthesis::synthesizeModuleTerms().

std::string oagFpga::VerilogDesign::Port::internalName

Definition at line 162 of file oagFpgaVerilogDesign.h. Referenced by oagFpga::VerilogSynthesis::synthesizeModuleTerms().

int oagFpga::VerilogDesign::Port::position

Definition at line 161 of file oagFpgaVerilogDesign.h.

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The documentation for this class was generated from the following file:

• oagFpgaVerilogDesign.h

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