WArPE : Wisconsin Architecture Power Estimator
TRIO2:interconnect synthesis under RLC model
iSIS: current and power estimation integrated with SIS package Estimation of average current, maximum switching current and power-up current Available online PowerImpact: cycle-accurate performance and power simulator for VLIW processors Based on IMPACT toolset for compiler optimization and microarchitecture-level performance simulation Integrating two parameterized power models Available online PTscalar: cycle-accurate performance and power simulator for SuperScalar processors Based on SimpleScalar toolset for microarchitecture-level performance, power and thermal simulation Consider interdependence between leakage power and temperature Available online fpgaEVA-LP2: A power evaluation framework for Field Programmable Gate Arrays(FGPAs) Use VPR-LP based on VPR to obtain placement and routing result and generate BC-netlist back-annotated with post-layout capacitances and delays Use Psim to perform cycle-accurate simulation and obtain FPGA power consumption Available online cktSteiner: circuit simulation based obstacle-aware Steiner routing package Map the uniform routing graph into an RC mesh Read in the pin locatons for a single net and reports the wirelength and runtime information Available online
PowerImpact: cycle-accurate performance and power simulator for VLIW processors Based on IMPACT toolset for compiler optimization and microarchitecture-level performance simulation Integrating two parameterized power models Available online PTscalar: cycle-accurate performance and power simulator for SuperScalar processors Based on SimpleScalar toolset for microarchitecture-level performance, power and thermal simulation Consider interdependence between leakage power and temperature Available online fpgaEVA-LP2: A power evaluation framework for Field Programmable Gate Arrays(FGPAs) Use VPR-LP based on VPR to obtain placement and routing result and generate BC-netlist back-annotated with post-layout capacitances and delays Use Psim to perform cycle-accurate simulation and obtain FPGA power consumption Available online cktSteiner: circuit simulation based obstacle-aware Steiner routing package Map the uniform routing graph into an RC mesh Read in the pin locatons for a single net and reports the wirelength and runtime information Available online
PTscalar: cycle-accurate performance and power simulator for SuperScalar processors Based on SimpleScalar toolset for microarchitecture-level performance, power and thermal simulation Consider interdependence between leakage power and temperature Available online fpgaEVA-LP2: A power evaluation framework for Field Programmable Gate Arrays(FGPAs) Use VPR-LP based on VPR to obtain placement and routing result and generate BC-netlist back-annotated with post-layout capacitances and delays Use Psim to perform cycle-accurate simulation and obtain FPGA power consumption Available online cktSteiner: circuit simulation based obstacle-aware Steiner routing package Map the uniform routing graph into an RC mesh Read in the pin locatons for a single net and reports the wirelength and runtime information Available online
fpgaEVA-LP2: A power evaluation framework for Field Programmable Gate Arrays(FGPAs) Use VPR-LP based on VPR to obtain placement and routing result and generate BC-netlist back-annotated with post-layout capacitances and delays Use Psim to perform cycle-accurate simulation and obtain FPGA power consumption Available online cktSteiner: circuit simulation based obstacle-aware Steiner routing package Map the uniform routing graph into an RC mesh Read in the pin locatons for a single net and reports the wirelength and runtime information Available online
cktSteiner: circuit simulation based obstacle-aware Steiner routing package Map the uniform routing graph into an RC mesh Read in the pin locatons for a single net and reports the wirelength and runtime information Available online
University of California Los Angeles
EDA Laboratory
