oagFpga::VerilogDesign Class Reference

An entire Verilog design. More...

#include <oagFpgaVerilogDesign.h>

List of all members.

Public Member Functions
	~VerilogDesign ()
	Destructor.
Public Attributes
std::list< Module * >	modules

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Detailed Description

An entire Verilog design.

Definition at line 17 of file oagFpgaVerilogDesign.h.

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Constructor & Destructor Documentation

oagFpga::VerilogDesign::~VerilogDesign (   )

Destructor. Definition at line 13 of file oagFpgaVerilogDesign.cpp. References modules.

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Member Data Documentation

std::list<Module *> oagFpga::VerilogDesign::modules

Definition at line 43 of file oagFpgaVerilogDesign.h. Referenced by oagFpga::VerilogSynthesis::synthesize(), oagFpga::VerilogSynthesis::synthesizeModuleInsts(), and ~VerilogDesign().

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The documentation for this class was generated from the following files:

• oagFpgaVerilogDesign.h
• oagFpgaVerilogDesign.cpp

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