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University of California Los Angeles
EDA Laboratory
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Best Paper Awards and Nominations:
| C120. |
Yu Hu, Zhe Feng, Lei He, and Ruapk Majumdar, "Robust FPGA Resynthesis Based on Fault Tolerant Boolean Matching", accepted by ICCAD 2008. (nomination for Best Paper Award)
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| C115. |
Zhen Cao, Brian Foo, Lei He, and Mihaela van der Schaar , "Optimality and Improvement of Dynamic Voltage Scaling Algorithms for Multimedia Applications", accepted by IEEE/ACM Design Automation Conference, June, 2008, Anaheim, CA. (nomination for Best Paper Award)
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| C108. |
Yiyu Shi, Jinjun Xiong, Chunchen Liu and Lei He, "Efficient Decoupling Capacitance Budgeting Considering Current Correlation Including Process Variation", IEEE/ACM International Conf. on Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2007.
(nomination for Best Paper Award)
(pdf)
(ppt)
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| C93. |
Hao Yu, Joanna Ho, and Lei He,
"Simultaneous Power and Thermal Integrity Driven Via Stapling in 3D ICs",
IEEE/ACM International Conf. on Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2006.
(nomination for Best Paper Award)
(pdf)
(ppt)
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| C85. |
Hao Yu, Yiyu Shi and Lei He, "Fast Analysis of Structured Power Grid by Triangularization Based Structure Preserving Model", in proceedings of IEEE/ACM Design
Automation Conference, San Francisco, CA, pp. 205-210, July 2006.
(nomination for Best Paper Award)
(pdf)
(ppt)
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| C81. |
Jinjun Xiong, Vladimir Zolotov, Lei He, "Robust Extraction
of Spatial Correlation,"
IEEE/ACM International Symposium on Physical Design,
San Jose, CA, pp. 2-9, April 2006. (Best Paper Award ).
(pdf)
(ppt)
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| J20. |
Fei Li, Yan Lin, Lei He, D. Chen, and J. Cong
"Power Modeling and Characteristics of Field Programmable Gate Arrays",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
Volume 24, Issue 11, Nov. 2005, pages 1712-1724. (link).(the 3rd most downloaded paper in 2006 among all papers ever published by IEEE Trans. on CAD)
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| C37. |
L. Zhang, T. Jing, X. Hong, J. Xu, J. Xiong and L. He,
"Performance optimization global routing with RLC crosstalk constraints",
International Conference on ASIC, Beijing, China, Volume:1, 21-24, pp. 191-194, Oct. 2003.
(pdf)
(ppt)
(Best Student Paper Award) |
| C11. |
L. He, N. Chang, S. Lin, and O. S. Nakagawa,
"An Efficient Inductance Modeling for On-chip Interconnects", (nomination
for Best Paper Award)IEEE Custom Integrated Circuits Conference,
San Diego, CA, pp. 457-460, May 1999. (pdf).
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J7.
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J. Cong and L. He,
"Theory and Algorithm of Local Refinement Based Optimization with Application to
Device and Interconnect Sizing,"IEEE Tran. on Computer-Aided Design, April
1999, pp. 406-420 (pdf). (best paper nomination)
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J4.
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L. He, K. H. Zhang and P. S. Tang, "FTSIM: A switch level fast timing
simulator,'' Chinese Institute of Electronics- Acta Electronica Sinica,
Feb. 1995, vol.23, (no.2):17-21. (Best Paper Award of Chinese
CAD/CAM Conference, Oct. 1993).
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Last update: 01-26-2007
